- Synopsis
-
A pure simulator for monadic concurrency with STM.
- Description
-
A pure simulator monad with support of concurrency (base & async style), stm,
synchronous and asynchronous exceptions, timeouts & delays, dynamic traces,
partial order reduction, and more.
= Documentation
Documentation is published
[here](https://input-output-hk.github.io/io-sim/io-sim).
- Author
-
Alexander Vieth, Duncan Coutts, John Hughes, Marcin Szamotulski
- Maintainer
-
Duncan Coutts duncan@well-typed.com, Marcin Szamotulski coot@coot.me
- License
-
Apache-2.0
- Source
-
-
https://github.com/input-output-hk/io-sim
- Commit hash
- 7bb26bf139b6e9386d1e8d49f6cba1f0f3342e70
- Subdir
- io-sim
- Timestamp
-
2026-03-24T08:52:16Z
- Revisions
-
None
- Dependencies
-
- library io-sim:
-
- ["base >=4.16 && <4.22","io-classes:{io-classes,si-timers,strict-stm} ^>=1.6 || ^>=1.7 || ^>=1.8","exceptions >=0.10","containers","deepseq","hashable","nothunks","primitive >=0.7 && <0.11","psqueues >=0.2 && <0.3","time >=1.9.1 && <1.13","quiet","QuickCheck","parallel"]
- test-suite bench:
-
- ["base","criterion ^>=1.6","io-classes","io-sim"]